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BLAKFRAME

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Bare-Metal Systems Engineering

BLAKFRAME is a systems engineering team based in the United Kingdom. The team builds custom, bare-metal no_std Rust microkernels for hard real-time data ingestion and deterministic scheduling. The architecture executes directly on dedicated hardware, bypassing the latency and scheduling overhead introduced by standard operating systems and hypervisor layers.

  • Min project size
    $100,000+
  • Hourly rate
    Undisclosed
  • Employees
    2 - 9
  • Locations
    London, England
  • Year founded
    Founded 2025

Overview by:

Reviewer avatar
David Tsarskykh
Director and Systems Architect About the Team

1 Locations

  • London , England

Service Lines
Custom Software Development
70%
Cybersecurity
30%
Select Focus Area
Application Platforms
Other app platform
100%
Cybersecurity focus
Digital Forensics & Auditing
35%
Threat/Attack Simulations
35%
Application Security
15%
Vulnerability Management
15%
Frameworks and CMS
Other frameworks and CMS
100%
Programming & Scripting
Rust
100%
Industries
Information technology
80%
Other industries
20%
Clients
Enterprise (>$1B)
55%
Midmarket ($10M - $1B)
45%

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Our Story

David Tsarskykh is the Director and Systems Architect of BLAKFRAME. His work is focused on the low-level design of custom, bare-metal no_std Rust microkernels for hard real-time data ingestion and deterministic scheduling. He applies formal verification using deductive frameworks and SMT solvers to prove the absence of undefined behaviour before any code reaches production hardware.

Meet the Team

David Tsarskykh

David TsarskykhDirector and Systems Architect

Systems Architect at BLAKFRAME LTD. Building custom, bare-metal no_std Rust microkernels for hard real-time data ingestion and deterministic scheduling.

What Sets Us Apart

No operating system layer.

BLAKFRAME builds microkernels that run directly on bare metal without a hypervisor or OS between the application and the hardware. Execution timing is mathematically bounded, not statistically estimated.

Formal verification before deployment.

Every critical execution path is verified using deductive formal methods and SMT solving before reaching production hardware. Safety properties are demonstrated, not tested for.

Memory safety enforced by the compiler.

Written in no_std Rust. Ownership, borrowing, and absence of data races are enforced at compile time. There is no runtime garbage collector, no manual memory management, and no policy document substituting for structural guarantees.

Quick Facts

1 year in business

Commonly Asked Questions

BLAKFRAME builds custom, bare-metal no_std Rust microkernels designed for hard real-time data ingestion and deterministic scheduling. The core architectural decision is the strict separation between two execution layers: the bare-metal microkernel layer, which handles deterministic CPU scheduling, memory-safe data ingestion, and interrupt handling with mathematically bounded latency; and the structuring layer above it, which organises high-velocity datasets into formats suitable for downstream processing pipelines. Those downstream systems may be classical HPC clusters, quantum-inspired optimisation hardware, or photonic computing networks — the microkernel layer is agnostic to what receives the data, provided it receives it in a deterministic, well-formed state. The flagship system under development is BLAKHOLE. The company is incorporated in England and Wales (Company No. 16726125) and operates on a principal-to-principal basis. All engagements are technical from the first conversation.

The work is relevant wherever execution timing must be guaranteed rather than approximated, and wherever a general-purpose operating system introduces latency, jitter, or memory overhead that the application cannot tolerate. Current target domains include 6G and telecom edge compute, where sub-millisecond scheduling determinism is a precondition for the radio access network control loops that next-generation infrastructure requires; industrial edge and PLC replacement, where IEC 62443-aligned memory safety and PROFINET-compatible deterministic execution must coexist; HPC data pre-processing, where the bottleneck is often the ingestion and structuring layer rather than the compute layer itself; and safety-critical embedded systems, where formal verification of execution properties is a certification requirement rather than a design preference. Partners in each of these sectors share a common evaluation requirement: the system must demonstrate its timing properties on dedicated hardware before any integration discussion proceeds.

The engagement model is structured around a specific architectural observation: partners in the target sectors operate their own simulation environments, formal verification toolchains, and hardware test infrastructures. Requesting access to those environments as a precondition for evaluation creates friction and raises security concerns on both sides. BLAKFRAME's approach is the inverse. The team produces runtime verification contracts and timing compliance models — expressed in formats compatible with tools such as TNO-ESI Maestro and standard SMT solvers — that allow a partner's own evaluation team to verify BLAKFRAME's execution timing claims entirely within their own controlled environment. Physical integration discussions begin only after that mathematical verification is complete and the partner's team has confirmed the results independently. This means every partnership that progresses past the evaluation stage has been validated by the partner's own engineers, using the partner's own tools, before any external system touches their infrastructure.

BLAKFRAME has published one external technical disclosure: a security analysis of Fiat-Shamir transcript binding in the monero-oxide CLSAG threshold multi-signature implementation, authored by David Tsarskykh. The analysis examines the ROS attack surface on transcript forking in the CLSAG multisig construction, identifies the binding mechanism in the upstream modular-frost dependency, and documents the proof-of-concept and proposed patch. The record is published on Zenodo under DOI 10.5281/zenodo.19161816, independently hosted on CERN infrastructure, indexed by OpenAIRE and Google Scholar, and linked from the author's ORCID profile (0009-0006-0885-9778). The research methodology — formal analysis of cryptographic protocol properties, SMT-backed reasoning about transcript binding — directly reflects the formal verification approach applied to the microkernel work. Publication frequency is determined by the completion of rigorous analysis, not by a schedule.

BLAKHOLE is in the hardening phase. This encompasses three parallel workstreams. The first is load testing under sustained high-velocity data ingestion conditions, validating that scheduling determinism is maintained under realistic production-equivalent traffic patterns rather than synthetic benchmarks. The second is formal verification of the core scheduling primitives using Creusot and Z3, producing machine-checked proofs that the absence of undefined behaviour holds across the complete input domain — not merely for the cases covered by a test suite. The third is Byzantine fault injection, stress-testing the system's behaviour under adversarial conditions including malformed inputs, timing attacks on the scheduling layer, and deliberate resource exhaustion. The node footprint is expanded only after execution timing has been validated on dedicated hardware by the partner's evaluation team. No production traffic runs on infrastructure that has not passed that validation threshold. The hardening phase is not a fixed timeline — it concludes when the proofs are complete and the hardware validation is confirmed.

Locations (1)

71 – 75 Shelton Street London, England WC2H 9JQ

1

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